1. Field of the Invention
The present invention relates to a motor drive circuit.
2. Description of the Related Art
A motor drive circuit normally includes an overcurrent protection circuit that protects the motor drive circuit from an overcurrent state caused by an accidental short circuit (source short, ground short, load short, etc.). Hereinafter, a motor drive circuit 10 including an overcurrent protection circuit will be described with reference to FIG. 5.
The motor drive circuit 10 has a configuration enclosed by alternate long and short dashed lines illustrated in FIG. 5. Specifically, the motor drive circuit 10 includes an H bridge circuit 11, a current passage control circuit 12, an overcurrent state detection circuit 13, an overcurrent protection circuit 14, and a mask period setting circuit 15; and the motor drive circuit 10 is externally connected to a motor coil 5 and a capacitor 6.
In the H bridge circuit 11, source transistors 1 and 2 on a power supply Vdd side and sink transistors 3 and 4 (for example, n-channel MOSFETs) on a grounding side are bridge-connected via the motor coil 5.
The current passage control circuit 12 controls the H bridge circuit 11 such that a pair of the source transistor 1 and the sink transistor 4 and a pair of the source transistor 2 and the sink transistor 3 are complimentarily switched ON and OFF. As a result, the direction of the drive current passed through the motor coil 5 is changed, so that the motor is driven to be rotated.
When the overcurrent state detection circuit 13 detects an overcurrent state in which current being passed through the transistors 1 to 4 exceeds a predetermined threshold value due to an external factor, the overcurrent state detection circuit 13 outputs an overcurrent state detection signal DET of a logic level (hereinafter referred to as “L level”) indicating the above. An overcurrent state occurs due to an external factor in a case where 1) each of the source transistors 1 and 2 on the source side is short-circuited to ground when the source transistors 1 and 2 are ON, and in a case where 2) each of the sink transistors 3 and 4 on the drain side is short-circuited to the power supply Vdd when the sink transistors 3 and 4 are ON.
When the overcurrent protection circuit 14 receives an L level overcurrent state detection signal DET indicating detection of an overcurrent state from the overcurrent state detection circuit 13, the overcurrent protection circuit 14 performs an overcurrent protection control to turn off all of the transistors 1 to 4 making up the H bridge circuit 11, as a general rule. However, there is a risk that the overcurrent state may be erroneously detected due to unexpected noise (a spike noise, etc.) superimposed on the drive current. Therefore, the overcurrent protection circuit 14 includes a configuration in which the overcurrent protection control of turning off all of the transistors 1 to 4 is temporarily prohibited during a time period from the time when the overcurrent state is detected by the overcurrent state detection circuit 13 until time the when a mask period has elapsed which is set as a charging period in the mask period setting circuit 15.
An external capacitor 6, which is easily attached and removed, is mainly used so that the mask period can be flexibly set according to circumstances of use of the motor drive circuit 10. Specifically, the mask period setting circuit 15 includes a comparator 16, a constant current source 17, and a discharge transistor 18 (for example, an n-channel MOSFET), and sets, as the mask period, a period during which a charging voltage of the capacitor 6 is increased from a predetermined voltage (0 level in a state where no charge is accumulated, or an initial level according to a charge in a state where the charge is accumulated) to reach a reference voltage Vref1.
Specifically, the discharge transistor 18 is turned off in response to the L level overcurrent state detection signal DET indicating detection of the overcurrent state, and the constant current source 17 starts charging the capacitor 6. When the charging voltage of the capacitor 6 reaches the reference voltage Vref1 from the predetermined voltage, the mask period has elapsed, and an output of the comparator 16 changes from H level to L level. Therefore, the overcurrent protection circuit 14 determines whether or not to perform an overcurrent protection control of turning off all of the transistors 1 to 4 based on the output logic level of the comparator 16.
Hereinafter, operations of the motor drive circuit 10 will be described based on a waveform diagram of main signals of the motor drive circuit 10 illustrated in FIG. 6.
First, at time TA, a case is assumed where the overcurrent state detection circuit 13 does not detect an overcurrent state and outputs an H level overcurrent state detection signal DET. In this case, complimentary ON/OFF control is performed by the current passage control circuit 12 for the transistors 1 to 4 making up the H bridge circuit 11 for driving the motor to be rotated. Also in this case, the discharge transistor 18 is ON due to the H level overcurrent state detection signal DET, and therefore, the capacitor 6 is in a state of not being charged.
Next, at time TB, a case is assumed where the overcurrent state caused by unexpected noise is detected by the overcurrent state detection circuit 13, and the L level overcurrent state detection signal DET is output. In this case, the discharge transistor 18 is turned off due to the L level overcurrent state detection signal DET, and therefore, the capacitor 6 starts being charged. At the time TB, the complimentary ON/OFF control for driving the motor to be rotated is performed as usual (in a state where the overcurrent state does not occur) for the transistors 1 to 4 by the current passage control circuit 12.
Next, at a time TC, a case is assumed where the overcurrent state detection circuit 13 determines that the overcurrent state is no longer detected since the overcurrent state detected at the time TB is caused by the unexpected noise, and outputs the H level overcurrent state detection signal DET. In this case, the discharge transistor 18 is turned on due to the H level overcurrent state detection signal DET, and therefore, the capacitor 6, which has continuously been charged from the time TB, is discharged.
During a period from the time TB to the time TC, the capacitor 6 is charged, but the charging voltage of the capacitor 6 does not reached the reference voltage Vref1, and the mask period of the mask period setting circuit 15 has not elapsed since the detection of the overcurrent state. In other words, the overcurrent protection circuit 14 determines that the overcurrent state detected during the period from the time TB to the time TC is caused by noise, and temporarily prohibits the overcurrent protection control of turning off all of the transistors 1 to 4.
Next, at a time TD, a case is assumed where the overcurrent state detection circuit 13 detects the overcurrent state caused not by noise but by an accidental short circuit, and outputs the L level overcurrent state detection signal DET. In this case, the discharge transistor 18 is turned off due to the L level overcurrent state detection signal DET, and therefore, the capacitor 6 starts being charged again. Also, a complimentary ON/OFF operation for driving the motor to be rotated is performed for the transistors 1 to 4 by the current passage control circuit 12.
Further, at a time TE, the charging voltage of the capacitor 6 reaches the reference voltage Vref1; and the mask period set by the mask period setting circuit 15 has elapsed since the detection of the overcurrent state at the time TD. Upon the elapse of the mask period, the overcurrent protection circuit 14 stops the ON/OFF control by the current passage control circuit 12 to perform the overcurrent protection control of turning off all of the transistors 1 to 4. (Japanese Patent Laid-Open Publication No. H5-111144)
As described above, the motor drive circuit including an overcurrent protection circuit has a configuration where the overcurrent protection control of turning off all of the drive transistors is temporarily prohibited during the period from the time when the overcurrent state is detected until the time when the mask period to be set as a charging period of the capacitor is elapsed assuming that the overcurrent state due to noise is an erroneously detected, and where the ON/OFF control is continued of the drive transistors for driving the motor to be rotated.
However, when having such a configuration, the overcurrent protection control is temporarily prohibited during the mask period, even though the overcurrent state is detected which is caused not by noise but by the accidental short circuit. Therefore, when the mask period is set improperly long, there is a risk of a failure of an object to be protected from overcurrent (a motor coil, a drive transistor, etc.)
A capacitor varies in capacitance, and variation in the capacitance occurs which is caused by environmental conditions such as temperature. Moreover, the failure conditions of the object to be protected from the overcurrent also vary with the applied voltage, supplied current, surrounding temperature, etc. Therefore, it is difficult to appropriately set the length of the mask period as the charging period of the capacitor to reduce erroneous detections of the overcurrent state caused by noise.